Fin field-effect transistor (FinFET) devices include a transistor architecture that uses raised source-to-drain channel regions, referred to as fins. A FinFET device can be built on a semiconductor substrate, where a semiconductor material, such as silicon, is patterned into a fin-like shape and functions as the channel of the transistor.
Semiconductor devices may include multiple FinFETs positioned adjacent each other on a buried insulating layer (e.g. buried oxide layer (BOX)) or a shallow trench isolation (STI) layer of a substrate. More specifically, each FinFET on a substrate may include an active gate extending perpendicular to and around one or more fins. Source/Drain regions are located at fin ends along a channel length direction on either side of the active gate. Known semiconductor devices may employ a dummy gate in a fin cut region between the adjacent FinFETs in order to create a diffusion break. The fin cut region can include a break in fin located at a space between adjacent FinFETs, for example, between a drain of a first transistor and a source of a second adjacent transistor.
In known semiconductor devices, the dummy gate creating the diffusion break between two FinFETs extends all the way down to a buried insulating layer or STI layer so that the dummy gate is positioned between the source/drain regions of the neighboring FinFETs, thereby forming parasitic capacitors with the source/drain regions, which degrades circuit performance and consumes power.